PAIOS2-AD, 2-ch DAB Receiver All in One [ RF + Demod + DSP ] SoC
with Two DAB Tuner for MRC or Audio and Data or BGS
There is no attach data.
Environmental Matter : RoHs CompliancePb Free Compliance

Chip Overview :
 PAIOS2-AD is a superior system on chip for DAB applications.
It fully supports both the Eureka 147 DAB consists of flexible hardware COFDM demodulator and Radio/Audio DSP Several interfaces such as SPI, I2C and UART are implemented providing c ustomers with more flexibility.
The PAIOS2-AD integrates the Tensilica HiFi EP DSP, offering the low-power, high-performance audio DSP core, support enhanced digital audio applications. The DSP EP core eliminates the need for the audio companion processors normally required for audio-based applications. In addition, dual DAB RF tuner are integrated with RF SOC technology. By removing the need for costly application coprocessors and memory subsystems and dual RF tuner, the PAIOS2-AD chipset solution reduces BOM costs. The PAIOS2-AD chipset solution integrates both DAB into a single chip.


  Multi-standards support: DAB / DAB+ / DMB-A / T-DMB / HD-DMB
  Dual DAB tuners are integrated and dual Digital I/Q Tuner interface for external RF device
  Outstanding SFN, Mobility, Adjacent and Co-channel rejection
  Ideal C/N Performance and Superior Fading Performance
  Decoding Information: FIC and MSC
  MRC Diversity support for both DAB 1.5 / DAB 2.0 system
  Low power consumption: MAX 990 mW (TBD)
  32-bits RISC architecture with integrated 24-bits audio processing instructions
  Modeless switching between 16-, 24-, and 64-bits dual-issue instructions
  Dual MACs can operate as 32 x 24-bits
  16MByte Mobile SDRAM stacked for high technology audio codec process and data service
  10 x 10 mm2, 0.65 mm pitch, 179-pin Fine pitch BGA technology.

  Automotive Digital Radio System for receiving dual channel DAB signals
  Aftermarket car radio and audio system
  Boom Box and Audio componen t system
  Smart Speaker system for Digital Radio
  Kitchen Radio application

Ordering Information
Order Number


Stacked SDRAM Size


Package Information

Ball Pitch


Body Size

10mm x10mmx1.2mm

Pin Count (Type)

179 pins (FBGA)

Supply Voltage




3.0 ~ 3.3V

Core Clock Speed

300MHz (TBD)

Operation Temperature

-40 ~ +85oC (TBD)

Storage Temperature

-50 ~ +150oC