PAIOS2-VD, a superior system on chip for DAB / DRM application
 
 
 
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Environmental Matter : RoHs CompliancePb Free Compliance

Chip Overview :
 PAIOS2-VD is a superior system on chip for DAB/DRM applications.
It fully supports both the Eureka 147 DAB and the DIGITAL Radio Mondiale [DRM] consists of flexible hardware COFDM demodulator and RADIO DSP Several interfaces such as SPI, I2C and UART are implemented providing customers with more flexibility.
The PAIOS2-VD integrates the Tensilica HiFi EP DSP, offering the low-power, high-performance audio DSP core, support enhanced digital audio applications. The DSP EP core eliminates the need for the audio companion processors normally required for audio-based applications.
In addition dual DAB RF tuner are integrated with RF SOC technology.
By removing the need for costly application coprocessors and memory subsystems and dual RF tuner, the PAIOS2-VD chipset solution reduces BOM costs. The PAIOS2-VD chipset solution integrates both DAB and DRM into a single chip.
 

Features
 Multi-standards support: DAB / DAB+ / DMB-A / DRM30 / DRM+ /T-DMB/ HD-DMB
 Dual DAB tuners are integrated and dual Digital I/Q Tuner interface for external RF device
 Outstanding SFN, Mobility, Adjacent and Co-channel rejection
 Ideal C/N Performance and Superior Fadin g Perf ormance
 Auto detect of transmission mode and guard (DAB)
 Decoding Information: FIC and MSC (DAB) / FAC, SDC and MSC (DRM)
Antenna Diversity(MRC) support for both DAB and DRM+ system
 Low power consumption: Max 990 mW [TBD]
 32-bits RISC architecture with integrated 24-bits audio processing instructions
 Modeless switching between 16-, 24-, and 64-bits dual-issue instructions
 Dual MACs can operate as 32 x 24-bits
 16Mbyte Mobile SDRAM stacked for high technology audio codec process and data service
 10 x 10 mm2, 0.65 mm pitch, 179-pin Fine pitch BGA technology.

Application  
 Automotive Digital Radio System for receiving dual channel DAB or dual channel DRM signals
 Aftermarket car radio and audio system
 Boom Box and Audio component system
 Smart Speaker sys tem fo r Digital Radio
 Kitchen Radio application

Ordering Information
Stacked SDRAM Size

16MByte

Package Information

Ball Pitch

0.65mm

Body Size

10mm ｘ10mmｘ1.3mm

Pin Count (Type)

179 pins (FBGA)

Supply Voltage

Core

1.2V

I/O

3.0 ~ 3.6V

Core Clock Speed

380MHz (TBD)

Operation Temperature

-40 ~ +85oC (TBD)

Storage Temperature

-50 ~ +150oC